Deep trench capacitors are used in a variety of semiconductor chips for high areal capacitance and low device leakage. Typically, a deep trench capacitor provides a capacitance in the range from about 4 fF to about 120 fF. A deep trench capacitor may be employed as a charge storage unit in a dynamic random access memory (DRAM), which may be provided as a stand-alone semiconductor chip, or may be embedded in a system-on-chip (SoC) semiconductor chip. A deep trench capacitor may also be employed in a variety of circuit applications such as a charge pump or a capacitive analog component in a radio-frequency (RF) circuit.
Semiconductor-on-insulator (SOI) devices formed on an SOI substrate or on a hybrid substrate provide high performance in advanced semiconductor chips. In SOI devices, the capacitive coupling between a substrate and semiconductor devices is reduced by the presence of a buried insulator layer. By forming a deep trench capacitor in the SOI substrate, SOI logic devices such as SOI transistors and deep trench capacitors may be formed on the same SOI substrate, thereby enabling embedding of deep trench capacitors into the SOI substrate that also contain high performance SOI logic devices.
Formation of a deep trench capacitor in an SOI substrate requires formation of an electrical contact to the outer node of the deep trench capacitor. In a bulk substrate, such an electrical contact to the outer node is accommodated by an ion implantation that forms a reachthrough region comprising a doped portion of the bulk substrate that extends from a top surface of the bulk substrate to a buried layer, which is electrically connected to a buried plate located on the outer sidewalls of the deep trench and constituting the outer node of the deep trench capacitor. In an SOI substrate, however, the presence of the buried insulator layer prevents formation of such a reachthrough since the buried insulator cannot be converted into a conductive structure by ion implantation.
In view of the above, there exists a need for a deep trench capacitor in an SOI substrate in which the outer node of the capacitor is electrically connected to a top surface of the SOI substrate by a conductive structure.
Further, there exists a need for methods of manufacturing such a deep trench capacitor in an SOI substrate with minimal additional processing steps over the processing steps required for manufacture of a deep trench in a bulk substrate.